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| SemiWell Semiconductor SFP840 N-Channel MOSFET Features High ruggedness RDS(on) (Max 0.85 )@VGS=10V Gate Charge (Typical 48nC) Improved dv/dt Capability, High ruggedness 100% Avalanche Tested Maximum Junction Temperature Range (150C) Symbol 2. Drain 1. Gate 3. Source General Description This Power MOSFET is produced using SemiWell's advanced planar stripe, DMOS technology. This latest technology has been especially designed to minimize on-state resistance, have a high rugged avalanche characteristics. This devices is specially well suited for half bridge and full bridge resonant topolgy like a electronic lamp ballast. TO-220 12 3 Absolute Maximum Ratings Symbol VDSS ID IDM VGS EAS EAR dv/dt PD TSTG, TJ TL Drain to Source Voltage Continuous Drain Current(@TC = 25C) Continuous Drain Current(@TC = 100C) Drain Current Pulsed Gate to Source Voltage Single Pulsed Avalanche Energy Repetitive Avalanche Energy Peak Diode Recovery dv/dt Total Power Dissipation(@TC = 25 C) Derating Factor above 25 C Operating Junction Temperature & Storage Temperature Maximum Lead Temperature for soldering purpose, 1/8 from Case for 5 seconds. (Note 2) (Note 1) (Note 3) (Note 1) Parameter Value 500 8 5.1 32 Units V A A A V mJ mJ V/ns W W/C C C 30 660 12.5 5 125 1.0 - 55 ~ 150 300 Thermal Characteristics Symbol RJC RCS RJA Parameter Thermal Resistance, Junction-to-Case Thermal Resistance, Case to Sink Thermal Resistance, Junction-to-Ambient Value Min. - Typ. 0.5 - Max. 1 62 Units C/W C/W C/W May, 2003. Rev. 0. Copyright@SemiWell Semiconductor Co., Ltd., All rights reserved. 1/7 SFP840 Electrical Characteristics Symbol Off Characteristics BVDSS BVDSS/ TJ IDSS Drain-Source Breakdown Voltage Breakdown Voltage Temperature coefficient Drain-Source Leakage Current Gate-Source Leakage, Forward Gate-source Leakage, Reverse VGS = 0V, ID = 250uA ID = 250uA, referenced to 25 C VDS = 500V, VGS = 0V VDS = 400V, TC = 125 C VGS = 30V, VDS = 0V VGS = -30V, VDS = 0V VDS = VGS, ID = 250uA VGS =10 V, ID = 4A 500 0.6 1 10 100 -100 V V/C uA uA nA nA ( TC = 25 C unless otherwise noted ) Parameter Test Conditions Min Typ Max Units IGSS On Characteristics VGS(th) RDS(ON) Gate Threshold Voltage Static Drain-Source On-state Resistance 2.0 4.0 0.85 V Dynamic Characteristics Ciss Coss Crss td(on) tr td(off) tf Qg Qgs Qgd Input Capacitance Output Capacitance Reverse Transfer Capacitance VGS =0 V, VDS =25V, f = 1MHz 1470 170 40 pF Dynamic Characteristics Turn-on Delay Time Rise Time Turn-off Delay Time Fall Time Total Gate Charge Gate-Source Charge Gate-Drain Charge(Miller Charge) VDS =400V, VGS =10V, ID =8A see fig. 12. (Note 4, 5) VDD =250V, ID =8A, RG =50 see fig. 13. (Note 4, 5) 22 25 130 30 48 7 20 60 nC ns - Source-Drain Diode Ratings and Characteristics Symbol IS ISM VSD trr Qrr NOTES 1. Repeativity rating : pulse width limited by junction temperature 2. L = 18.5mH, IAS =8A, VDD = 50V, RG = 0 , Starting TJ = 25C 3. ISD 10A, di/dt 300A/us, VDD BVDSS, Starting TJ = 25C 4. Pulse Test : Pulse Width 300us, Duty Cycle 2% 5. Essentially independent of operating temperature. Parameter Continuous Source Current Pulsed Source Current Diode Forward Voltage Reverse Recovery Time Reverse Recovery Charge Test Conditions Integral Reverse p-n Junction Diode in the MOSFET IS =8A, VGS =0V IS=8A, VGS=0V, dIF/dt=100A/us Min. - Typ. 335 3.6 Max. 8 32 2.0 - Unit. A V ns uC 2/7 SFP840 Fig 1. On-State Characteristics Fig 2. Transfer Characteristics Top : ID, Drain Current [A] ID, Drain Current [A] 10 1 15V 10V 8.0V 7.0V 6.0V 5.5V 5.0V Bottom : 4.5V 10 1 150 C 10 0 o 25 C o 10 0 -55 C o Notes : 1. VDS = 50V 2. 250 s Pulse Test 10 -1 10 -1 10 0 10 1 10 -1 2 3 4 VDS, Drain-Source Voltage [V] VGS, Gate-Source Voltage [V] 5 6 7 8 9 10 Fig 3. On Resistance Variation vs. Drain Current and Gate Voltage 1.8 Fig 4. On State Current vs. Allowable Case Temperature RDS(ON), Drain-Source On-Resistance [ ] 1.6 1.4 1.2 1.0 0.8 0.6 0.4 IDR, Reverse Drain Current [A] 10 1 VGS = 20V VGS = 10V 10 0 150 25 Notes : 1. VGS = 0V 2. 250 s Pulse Test 0 5 10 15 20 25 10 -1 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 ID, Drain Current [A] VSD, Source-Drain Voltage [V] Fig 5. Capacitance Characteristics 3000 Ciss=Cgs+Cgd(Cds=shorted) Coss=Cds+Cgd Crss=Cgd Fig 6. Gate Charge Characteristics 12 VGS, Gate-Source Voltage [V] 2500 10 VDS = 400V VDS = 250V Capacitance [pF] 2000 Notes : 1. VGS = 0V 2. f=1MHz 8 1500 Ciss 6 1000 4 500 2 Note : ID = 8 A 0 Coss Crss 0 5 10 15 20 25 30 35 40 0 0 10 20 30 40 50 60 VDS, Drain-Source Voltage [V] QG, Total Gate Charge [nC] 3/7 SFP840 Fig 7. Breakdown Voltage Variation 1.2 3.0 Fig 8. On-Resistance Variation BVDSS, (Normalized) Drain-Source Breakdown Voltage RDS(on), (Normalized) Drain-Source On-Resistance 2.5 1.1 2.0 1.0 1.5 1.0 Notes : 1. V GS = 10 V 2. ID = 4 A 0.9 Notes : 1. VGS = 0 V 2. ID = 250 A 0.5 0.8 -100 -50 0 50 100 o 150 200 0.0 -100 -50 0 50 100 o 150 200 TJ, Junction Temperature [ C] T J, Junction Temperature [ C] Fig 9. Maximum Safe Operating Area 10 2 Fig 10. Maximum Drain Current vs. Case Temperature 8 Operation in This Area is Limited by R DS(on) ID, Drain Current [A] 10 1 1 ms 10 ms DC ID' Drain Current [A] 100 s 6 4 10 0 Notes : 1. TC = 25 C 2. TJ = 150 C 3. Single Pulse o o 2 10 -1 10 0 10 1 10 2 10 3 0 25 50 75 100 o 125 150 VDS, Drain-Source Voltage [V] TC' Case Temperature [ C] Fig 11. Transient Thermal Response Curve Z JC(t), Thermal Response 10 0 D = 0 .5 0 .2 10 -1 0 .1 0 .0 5 0 .0 2 0 .0 1 s in g le p u ls e N o te s : 1 . Z J C t) = 1 /W M a x . ( 2 . D u ty F a c to r , D = t 1 /t 2 3 . T JM - T C = P D M * Z JC (t) 10 -2 10 -5 10 -4 10 -3 10 -2 10 -1 10 0 10 1 t 1 , S q u a re W a v e P u ls e D u ra tio n [s e c ] 4/7 SFP840 Fig. 12. Gate Charge Test Circuit & Waveforms 50K 12V 200nF 300nF Same Type as DUT VDS VGS 10V Qgs Qg VGS Qgd DUT 1mA Charge Fig 13. Switching Time Test Circuit & Waveforms VDS RL VDD ( 0.5 rated V DS ) VDS 90% 10V V Pulse Generator RG DUT Vin 10% td(on) t on tr td(off) t off tf Fig 14. Unclamped Inductive Switching Test Circuit & Waveforms VDS ID RG L VDD BVDSS 1 EAS = ---- LL IAS2 -------------------2 BVDSS -- VDD BVDSS IAS ID (t) 10V DUT VDD tp VDS (t) Time 5/7 SFP840 Fig. 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms DUT + VDS _ IS L Driver RG Same Type as DUT VDD VGS * dv/dt controlled by RG * IS controlled by pulse period VGS ( Driver ) Gate Pulse Width D = -------------------------Gate Pulse Period 10V IFM , Body Diode Forward Current IS ( DUT ) IRM di/dt Body Diode Reverse Current VDS ( DUT ) Body Diode Recovery dv/dt Vf VDD Body Diode Forward Voltage Drop 6/7 SFP840 TO-220 Package Dimension Dim. A B C D E F G H I J K L M N O Min. 9.7 6.3 9.0 12.8 1.2 mm Typ. Max. 10.1 6.7 9.47 13.3 1.4 Min. 0.382 0.248 0.354 0.504 0.047 Inch Typ. Max. 0.398 0.264 0.373 0.524 0.055 1.7 2.5 3.0 1.25 2.4 5.0 2.2 1.25 0.45 0.6 3.6 3.4 1.4 2.7 5.15 2.6 1.55 0.6 1.0 0.118 0.049 0.094 0.197 0.087 0.049 0.018 0.024 0.067 0.098 0.134 0.055 0.106 0.203 0.102 0.061 0.024 0.039 0.142 O E B A H I F C M G 1 D 2 3 L 1. Gate 2. Drain 3. Source N O J K 7/7 |
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